Digital Acoustics ESBx-110 Especificaciones descargar pdf (Pagina 188)

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101

Control Block Description

ADDvantage-32 PLUS

4-58

1. Inputs

LTCH1: Bit

LTCH2: Bit

HLD1: Bit

HLD2: Bit

EDGE: Bit

2. Outputs

OUT: Bit

3. Implementation

If EDGE is low, then:

If either latch (LTCH1 or LTCH2) is high and both holds (HLD1 and HLD2) are high,

then OUT goes high and stays high, even if both latches later go low, as long as both

holds stay high.

When either hold (HLD1 or HLD2) is low, then OUT goes low no matter what the

state of the latch bits. The hold inputs have a higher priority than the latch bits. If the

hold bits later go high, the condition of OUT will be determined by the condition of

the latch bits at that time.

If EDGE is high, then:

If either latch (LTCH1 or LTCH2) transitions from low to high, the OUT goes high

and stays high, even if both latches later go low.

When either hold (HLD1 or HLD2) transitions from a high to low, the OUT goes low

no matter what the state of the latch bits.

If either latch (LTCH1 or LTCH2) transitions from low to high at the same time as

either hold (HLD1 or HLD2) transitions from a high to low, the hold will have priority

over the latch and the OUT goes low.

High to low transitions of either latch (LTCH1 or LTCH2) and low to high transitions

of either hold (HLD1 or HLD2) will not change the state of the OUT.

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Digital Acoustics ESBx-110 Especificaciones Pagina 188

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