Digital Acoustics ESBx-110 Especificaciones descargar pdf (Pagina 250)

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101

Control Block Description

ADDvantage-32 PLUS

4-120

3. Implementation

When the RES bit equals zero, VAL is set to 0.

When VAL = 0, then ZERO bit = 1.

If VAL

≠

0, then ZERO bit = 0.

When the HLD bit is high, VAL is frozen. The RES bit has higher priority than the HLD

bit.

If RES = 1 and HLD = 0, then the following occurs:

If REF = 1 and VAL < CNT, then VAL = VAL + 1.

If REF = 0 and VAL > 0, then VAL = VAL - 1.

If VAL = CNT, then SET = 1, else SET = 0.

When SET = 1, it latches until a reset occurs.

Non-retentive Block

On powerup of the ADDvantage-32 PLUS, VAL = 0

Retentive Block

On powerup of the ADDvantage-32 PLUS, VAL will be initialized under the following

conditions:

If RET = 0, then VAL = 0

If RET = 1, VAL is set to its last value prior to power loss. VAL must be

configured to a retentive point Y***:RET SETPT* to be updated automatically

on powerup.

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Digital Acoustics ESBx-110 Especificaciones Pagina 250

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